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| AU1564/2064 DATA SHEET AU Series : AU1564, AU1564A, AU2064, AU2064A 4-bit LOGPCM15, 204-bit4-bit ALU ( )1K15 bits ROM644bits RAM I/O PORTLCD 78 Halt function () 1. 2.4 - 6 2. 15, 20, 64(section) (AU1564, AU1564A -->15 ; AU2064, AU2064A -->20) 3. . 4. 864. 5. 3x 24=72()LCDHALVER. 6. 7. ROM102415bitsRAM644bits 8. 24 bits( AU1564, AU1564A S4 pad ) 9. 24 bits/ 10. 4bits 11. 12. 78 13. 4 14. 2 (INT, S&M port) 15. 2 (Timer, Divider) 16. 3 1.5mA, 3mA, 4.5mA (AU1564, AU1564A COUT ) 1 Rev 2.0 AU Series General Description: The AU1564, AU1564A, AU2064, AU2064A is a single chip voice synthesizer with 4-bit microprocessor. That can synthesize voice up to 15, 20 seconds by ALPHA qualified coding algorithm (LOGPCM). The 4-bit microprocessor has various feature including 4-bit ALU, 1Kx15 bits ROM, 64x4 bits RAM, I/O port, timer, clock generator, LCD driver, etc. The instruction set with 78 instructions. With the half function can minimize power dissipation. Features: 1. Single power supply can operate from 2.4V through 6V 2. The total voice duration is about 15, 20 seconds could be partitioned up to 64 sections (AU1564, AU1564A -->15 seconds, AU2064, AU2064A -->20 seconds) 3. The voice can be triggered by microprocessor instructions 4. Current output could drive 8 ohm speaker with a transistor, VOUT could drive buzzer or 64 ohm directly. 5. LCD driver provided, up to 3x 24=72 segments. Build-in HALVER circuitry. 6. Build-in clock generator 7. Internal ROM: 1024x15 bits Internal RAM: 64x4 bits 8. Two 4-bit input ports (AU1564, AU1564A has no S4 pad) 9. Two 4-bit I/O ports 10. One 4-bit output port 11. One control output pins 12. 78 instructions 13. 4-level subroutine nesting (also used for interrupt) 14. Two external factors (INT, S & M port) for interrupt 15. Two internal factors (Timer , Divider) for interrupt 16. Three current output level 1.5mA, 3mA, 4.5mA is mask option (full scale). (AU1564, AU1564A has no COUT output function) Block Diagram : 2 Rev 2.0 AU Series LCD Common Plate Usage: COM1 COM2 COM3 Alternating frequency Voice Trigger: The voice circuitry will be Triggered in the rising edge of TRG signal. The Voice section address must be placed on I/OA and I/OB port. Static Yes No No 32Hz 1/2 duty Yes Yes No 32Hz 1/3 duty Yes Yes Yes 43Hz I/OB2 I/OB1 I/OA4 I/OA3 I/OA2 I/OA1 (MSB) (LSB) a)In power on state, TRG signal is reset to "LOW" level. TRG will stay at low level until the program set it to "HIGH" level. b) Before triggering the voice circuitry, used the OIOA and OIOB instruction to place the voice section address on I/OA and I/OB port. The voice section address couldn't be changed until the rising edge of TRG signal. c) After triggering voice, I/OA and I/OB ports must output 3F data or set to input mode. If not, there will be a standby current problem. d) Example of playing voice subroutine: Triggering the 26th(1Ah) section LDS 3,1 LDS 4,A OIOB 3 ; place voice section address to i/o port OIOA 4 RF 4 ; trigger voice SF 4 LDS 3,3 LDS 4,F OIOA 4 ; output 3F data to I/O port OIOB 3 Absolute Maximum Rating: (VDD=3V, VSS2=0V) Symbol Rating Unit VSS1 1.2-1.8 V GND 0-0.6 V CUP1 VSS2-VSS1 V CUP2 VSS1-VDD V OSCIN GND-VDD V OSCOUT GND-VDD V S1-S4 VSS2-VDD V M1-M4 VSS2-VDD V IOA1-IOA4 VSS2-VDD V IOB1-IOB4 VSS2-VDD V INT/BUSY VSS2-VDD V Symbol RESET TRG P1-P4 SEG1-24 COM1-3 VOUT1-2 T(operating) T(storage) Rating VSS2-VDD VSS2-VDD VSS2-VDD VSS2-VDD VSS2-VDD VSS2-VDD -10-+60 -55-+125 Unit V V V V V V 3 Rev 2.0 AU Series DC Characteristics :( VDD=3V, VSS=0V ) Symbol VDD ISB IOP VOH1 VOL1 VOH2 VOL2 RI1 Parameter Operating Voltage Standby Current Operation Current Output High Voltage (IOA, IOB, P) Output Low Voltage (IOA, IOB, P) Output High Voltage (TRG) Output Low Voltage (TRG) Input Resistance (S, M) Min. 2.4 Tpy. 3 1 3 0 3 0 1.3 Max. 6 Unit V uA uA V V V V Mohm "L"-level hold Tr.=OFF Pull-down Tr.=ON Condition VDD=3V, no load R12 R13 R14 IO1 ICO F/F F/F Input Resistance (S, M) Input Resistance (INT/BUSY) Input Resistance (RESET) O/P Current VOUT1, VOUT2 O/P Current (COUT) Crystal Oscillator Frequency Stability Voice Oscillator Frequency Variation 230 Kohm Kohm "L"-level hold Tr.=ON Pull-down Tr.=OFF 16.8 Kohm -1.5 -3 -4.5 mA full scale % % 4 Rev 2.0 AU Series Pad Description: Pad No. 1 2-3 4 5 6 7-30 31 32-33 34 35-36 37-38 39 40-43 44 45 46 47 48 49 50-51 52-53 54 55-58 59-62 63 64-65 Pad Name VDD CUP1-2 OSCIN OSCOUT COM1 SEG1-24 VDD COM2-3 GND VSS1-2 S4-3 TRG IOA1-4/S0-3 RESET VOSC COUT VOUT1 VSS2 VOUT2 IOB1-2/S4-5 IOB3-4 INT/BUSY P1-4 M1-4 N.C. S2-1 I/O P I I I O O P O G G I I I/O I I O O G O I/O I/O I/O O I N.C. I Function Description Positive Power supply Voltage Halver Capacitor Crystal Oscillator Input, 32768Hz Crystal Oscillator Output, 32768Hz Common plate for LCD panel 24 segment outputs for LCD panel Positive Power supply Common plate for LCD panel Backup negative power supply Negative power supply Input port Audio output enable signal. Latch voice Section address Voice section address. Internal pull-up System reset Voice oscillator input Audio signal current output Audio signal voltage output Negative power supply Audio signal voltage output Voice section address. Internal pull-up. I/O port, 2 bits Voice busy status, CPU interrupt request Output port Input port Input port 5 Rev 2.0 AU Series Typical Application: AU1564, AU1564A has no COUT output function 6 Rev 2.0 AU Series Bonding Diagram: PRODUCT AU2064 AU2064A AU1564 AU1564A X 3530 3050 Y 2750 2540 PAD Size ( um^2 ) 85 * 85 80 * 80 Substrate VDD VDD UNIT um um FOR AU2064, AU2064A: 7 Rev 2.0 AU Series FOR AU1564, AU1564A: 8 Rev 2.0 AU Series AU2064, AU2064A pad location Pad No. Pad Name X VDD -1614.2 1 CUP1 -1614.2 2 CUP2 -1612.5 3 OSCIN -1631.7 4 OSCOUT -1632.6 5 CON1 -1631.7 6 SEG1 -1632.6 7 SEG2 -1632.6 8 SEG3 -1632.6 9 SEG4 -1479.6 10 SEG5 -1335.1 11 SEG6 -1190.6 12 SEG7 -1046.1 13 SEG8 -901.6 14 SEG9 -757.1 15 SEG10 -612.6 16 SEG11 -468.1 17 SEG12 -323.6 18 SEG13 -179.1 19 SEG14 -34.6 20 SEG15 109.9 21 SEG16 254.4 22 SEG17 398.9 23 SEG18 543.4 24 SEG19 687.9 25 SEG20 832.4 26 SEG21 976.9 27 SEG22 1121.4 28 SEG23 1265.9 29 SEG24 1410.4 30 VDD 1554.9 31 COM3 1631.7 32 COM2 1631.7 33 Y 174.6 21.6 -131.4 -284.4 -530.2 -750.9 -903.9 -1056.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1209.9 -1056.9 -608.1 Pad No. 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 Pad Name GND VSS1 VSS2 S4 S3 TRG IOA1 IOA2 IOA3 IOA4 RESET VOSC COUT VOUT1 VSS2 VOUT2 IOB1 IOB2 IOB3 IOB4 INT P1 P2 P3 P4 M1 M2 M3 M4 TESTA S2 S1 X 1595.4 1601.8 1618.1 1631.7 1631.7 1631.7 1631.7 1631.7 1631.7 1631.7 1364.4 1146.8 757.5 510.7 339.1 167.5 -38.5 -191.5 -344.5 -497.5 -667.5 -820.5 -973.5 -1126.5 -1279.5 -1432.5 -1603.4 -1631.7 -1631.7 -1631.7 -1631.7 -1631.7 Y -455.1 -302.1 -149.1 3.9 190.1 343.1 496.1 649.1 802.1 1070.2 1216.2 1216.2 1216.2 1188.6 1192.0 1188.6 1216.2 1216.2 1216.2 1216.2 1216.2 1216.2 1216.2 1216.2 1216.2 1216.2 1216.2 972.7 819.7 666.7 513.7 327.6 9 Rev 2.0 AU Series AU1564, AU1564A pad location Pad No. Pad Name X Y Pad No. Pad Name VDD -1380.6 164.3 COM2 1 33 CUP1 -1380.6 20.3 GND 2 34 CUP2 -1379 -123.7 VSS1 3 35 OSCIN -1397.16 -267.7 VSS2 4 36 OSCOUT -1397.96 -496.72 S3 5 37 COM1 -1397.16 -695.92 TRG 6 38 SEG1 -1397.96 -830.32 IOA1 7 39 SEG2 -1397.96 -968.72 IOA2 8 40 SEG3 -1397.96 -1127.92 IOA3 9 41 SEG4 - 1273.96 -1138.72 IOA4 10 42 SEG5 -1149.96 -1138.72 RESET 11 43 SEG6 -1025.96 -1138.72 VOSC 12 44 SEG7 -901.96 -1138.72 VOUT1 13 45 SEG8 -777.96 -1138.72 VSS2 14 46 SEG9 -653.96 -1138.72 VOUT2 15 47 SEG10 -529.96 -1138.72 IOB1 16 48 SEG11 -405.96 -1138.72 IOB2 17 49 SEG12 -281.96 -1138.72 IOB3 18 50 SEG13 -157.96 -1138.72 IOB4 19 51 SEG14 -33.96 -1138.72 INT 20 52 SEG15 90.04 -1138.72 P1 21 53 SEG16 214.04 -1138.72 P2 22 54 SEG17 338.04 -1138.72 P3 23 55 SEG18 462.04 -1138.72 P4 24 56 SEG19 586.04 -1138.72 M1 25 57 SEG20 710.04 -1138.72 M2 26 58 SEG21 834.04 -1138.72 M3 27 59 SEG22 958.04 -1138.72 M4 28 60 SEG23 1082.04 -1138.72 TESTA 29 61 SEG24 1206.04 -1138.72 S2 30 62 VDD 1330.04 -1138.72 S1 31 63 COM3 1397.16 -645.44 32 X 1397.16 1362.92 1369 1384.36 1397.16 1397.16 1397.16 1397.16 1397.16 1397.16 1154.2 946.6 692.28 530.76 369.24 70.92 -66.68 -199.48 -337.08 -491.48 -635.48 -779.48 -923.48 -1067.48 -1211.48 - 1372.36 -1397.16 - 1397.16 -1397.16 -1397.16 -1397.16 Y -232.64 -83.84 52.16 188.16 357.76 484.96 614.56 743.2 872.8 1012.8 1144.6 1144.6 1118.7 1121.8 1118.7 1144.6 1144.6 1144.6 1144.6 1144.6 1144.6 1144.6 1144.6 1144.6 1144.6 1144.6 915.5 771.5 627.5 483.5 308.3 10 Rev 2.0 AU Series PCB layout notice: 1. Use two lines to connect PAD1 and PAD31. The VDD line connected to PAD31 should be wider than another one. Because PAD31 must supply the higher current. 2. Use two VSS2 lines to connect PAD36 and PAD48 (for AU1564 and AU1564A, connect PAD 36 and PAD 46). The VSS2 line connected to PAD48 (for AU1564 and AU1564A, connect PAD 46) should be wider than another one. Because PAD48(for AU1564 and AU1564A, PAD 46) must sink the higher current. 3. Use the VDD line connected to PAD1 as the down-bond substrate. *NOTE : all data and specification are subject to change without notice. 11 Rev 2.0 |
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